- Seminari
- Use of two neural networks for more than two independent jobs and multi-node implementation of quantum circuit simulators
Use of two neural networks for more than two independent jobs and multi-node implementation of quantum circuit simulators
Relatore
Masahiro Fujita - University of Tokyo
Data
14-mar-2025 - Ora:
11:00
Sala Verde (presenza)
Abstract:
In this talk, we briefly discuss our two different works.
The first work explores and advances the potential of Implicit Neural Representation (INR) as a transformative approach to image compression. While previous research has employed INR to achieve compression by training small networks to reconstruct large images, this work proposes a novel advancement by representing multiple images with a single network. By modifying the loss function during training, the proposed approach allows a small number of sets of weights to represent a large number of images, even those significantly different from each other. Intensive experiments as well as analytical study of the convergence of this new training method are given to show the usefulness of the proposed approach.
The second work shows our decision diagram based quantum circuit simulator implementation on top of non-shared memory parallel (classical) computers. It achieves 26 times speed up over single node machines on the 38 qubits Shor’s algorithm for factorization, and can finish the simulation in 147 seconds. Also, it is shown that ring communication has a higher speed-up effect than broadcast communication even if the physical communication topology of the parallel computers is high-dimension mesh or torus, and the importance of selecting the appropriate automatic qubit swap insertion method is revealed which significantly speed up simulation.
In this talk, we briefly discuss our two different works.
The first work explores and advances the potential of Implicit Neural Representation (INR) as a transformative approach to image compression. While previous research has employed INR to achieve compression by training small networks to reconstruct large images, this work proposes a novel advancement by representing multiple images with a single network. By modifying the loss function during training, the proposed approach allows a small number of sets of weights to represent a large number of images, even those significantly different from each other. Intensive experiments as well as analytical study of the convergence of this new training method are given to show the usefulness of the proposed approach.
The second work shows our decision diagram based quantum circuit simulator implementation on top of non-shared memory parallel (classical) computers. It achieves 26 times speed up over single node machines on the 38 qubits Shor’s algorithm for factorization, and can finish the simulation in 147 seconds. Also, it is shown that ring communication has a higher speed-up effect than broadcast communication even if the physical communication topology of the parallel computers is high-dimension mesh or torus, and the importance of selecting the appropriate automatic qubit swap insertion method is revealed which significantly speed up simulation.
Masahiro Fujita (Life Member, IEEE) received
the Ph.D. degree in information engineering from
the University of Tokyo, Tokyo, Japan, in 1985.
He joint Fujitsu, Tokyo, in 1985. From 1993 to
2000, he was assigned to Fujitsu Laboratories of
America, Santa Clara, CA, USA, where he was the
Director of the VLSI CAD research group. Since
2000, he has been a Professor with the VLSI Design
and Education Center, University of Tokyo, until he
retired in 2022. He is currently a Researcher with
University of Tokyo. His research interests include
hardware/software codesigns targeting embedded systems and formal analysis,
verification, and synthesis of cyber–physical systems. Recently he is also
working on hardware implementation of neural network-based information
processing systems, such as learned image compression.
Dr. Fujita has been a program and steering committee member in many
prestigious international conferences and journals.
the Ph.D. degree in information engineering from
the University of Tokyo, Tokyo, Japan, in 1985.
He joint Fujitsu, Tokyo, in 1985. From 1993 to
2000, he was assigned to Fujitsu Laboratories of
America, Santa Clara, CA, USA, where he was the
Director of the VLSI CAD research group. Since
2000, he has been a Professor with the VLSI Design
and Education Center, University of Tokyo, until he
retired in 2022. He is currently a Researcher with
University of Tokyo. His research interests include
hardware/software codesigns targeting embedded systems and formal analysis,
verification, and synthesis of cyber–physical systems. Recently he is also
working on hardware implementation of neural network-based information
processing systems, such as learned image compression.
Dr. Fujita has been a program and steering committee member in many
prestigious international conferences and journals.
- Data pubblicazione
- 28-feb-2025
- Referente
- Tiziano Villa
- Dipartimento
- Informatica
